WP 7.6: Complex imaging ASICs and technologies

Contacts:

  • M. Barbero, CPPM,
  • M. Rolo, INFN,
  • I. Sedgwick, RAL
  • W. Snoeys, CERN
  • M. Caselle, KIT
  • L. Andricek, MPG HLL
  • S. Charlebois, Sherbrooke

Indico link

This project aims to provide common access to advanced imaging technologies through the organization of common fabrication runs. These are initially envisaged for the TowerJazz 180 nm, TPSCo 65 nm ISC, and the LFoundry 110 nm CMOS imaging technologies. These will be accessible for different clients in the community, among which the other DRDs like DRD3, experiments and projects in HEP. Assembly of the reticle for the different runs is foreseen, as well as design support for the PDK, development of special design rules, TCAD support for sensor optimization and interfacing to the foundry. IP development is also foreseen to accelerate and streamline the design effort. Continuation of this common access beyond the initial three years is expected. Synergy with the 7.6b 3D development will be explored possibly with already existing chips or chiplets. Full 3D-stacked runs, offered in all three technologies, may possibly be pursued later. Common access through the organization of common runs is initially envisaged for the TowerJazz 180 nm, TPSCo 65 nm ISC, and LFoundry 110 nm CMOS imaging technologies, all allowing 1-D and 2-D stitching. These common runs, shared among the clients (for example, other DRDs like DRD3, experiments and projects in HEP) will contain small test chips (chiplets), reticle scale devices and stitched prototypes. A successful run requires assembly of the different prototypes into the reticle, design support (PDK, special design rules, etc.), technology support including TCAD to support sensor optimization, and interfacing to the foundry. Some reruns at much lower cost and effort, with only few mask changes, may be envisaged for sensor optimization. IP development for general use is also foreseen, to accelerate and streamline the design effort. The project comprises several activities:

Silicon TPSCo 65 nm ISC Design support of common runs Silicon TPSCo 65 nm ISC Logistics Silicon TPSCo 65 nm ISC TCAD and Technology Support Silicon TPSCo 65 nm ISC Interface to the foundry Silicon TPSCo 65 nm ISC IP Development Silicon TJ 180 nm Design support of common runs Silicon TJ 180 nm IS Logistics Silicon TJ 180 nm IS TCAD and Technology Support Silicon TJ 180 nm IS Interface to the foundry Silicon TJ 180 nm IS IP Development Silicon LF 110 nm is Design support of common runs Silicon LF 110 nm is Logistics Silicon LF 110 nm is TCAD and Technology Support Silicon LF 110 nm is Interface to the foundry Silicon LF 110 nm is IP Development

Contributors: CERN (CH), IN2P3 (FR), INFN (IT), Nikhef (NL), STFC RAL (UK), Norway groups (NO), US DOE (US)

Project contact person: M. Barbero, CPPM, M. Rolo, INFN, I. Sedgwick, RAL and W. Snoeys, CERN

Project 7.6b: Shared access to 3D integration

This project aims to develop essential technologies for both 2.5D and 3D integration that can be quickly transposed to wafer-to-wafer 3D integration for a wide range of future particle physics applications, ranging from low-temperature neutrino detectors to high-radiation environment HL-HLC pixel detectors. Synergy with the 7.6a will be explored by employing either already existing chips or dedicated test structures. Furthermore, 3D-integration technologies are evolving quickly in industry. Therefore, exploring concrete connections with industrial partners is a key mission of the project. The main mission of the project is to provide access to critical integration technologies for the R&D of future detector prototypes. Access to 2.5D and 3D technologies is initially planned through collaborating institutes by both in-house technologies and industrial partners. The critical technologies to be developed and qualified include the formation of through silicon vias (TSV) for interchip connections and redistribution layers (RDL) and back-side metallization on dummy wafers, real CMOS sensors and custom-designed silicon interposer layers. The combination of these two technologies, along with already existing in-house packaging technologies, will allow for a rapid transition towards the implementation of 3D-ASIC integration at the level of a single assembly (e.g. Multi-Project Wafer). Above that, after the initial three-year project, these technologies will also facilitate a quick transposition to wafer-to-wafer (W2W) direct bonding technologies on 8-inch wafers at the Max Planck Institute. In addition to in-house activities, exploring and establishing a concrete connection with indus trial partners represents a key mission of the project. Sherbrooke University, Fermilab and the University of Oslo (UiO), will collaborate with industrial partners. In particular, Sherbrooke collaborates with Teledyne DALSA for the development and qualification of W2W bonding technology and IZM for detector packaging. Fermilab launched the Chicago 3D Chips Codesign Community to foster the type of ecosystem necessary to push developments in this area and UiO will address the 3D-sequential integration technology under development by CEA-LETI and STMicroelectronics. The project objective includes also the employment of TSV, RDL and interposer technologies for the direct integration of photonic chips on detector modules. In collaboration with 7.1, the ultimate goal is to establish the necessary process steps to ensure the long-term availability of the integration of silicon photonics (SiPh) chips and optical fibers on already available sensors or test structures manufactured in the technologies offered by 7.6a. The project will feature various topics to be addressed by different collaborators in order to build a complete picture of the full potential offered by the 2.5D and chiplet technologies. These are:

Provide access to TSV technology Provide access to RDL technology Provide access to 2D-bonding process Provide access to chiplet/2.5D integration Provide access to W2W, C2W by industrial partners Integration of monolithic/hybrid PIC on the detector

Contributors: Semiconductor Laboratory of the Max Planck Society (DT), KIT (DT), Fachhochschule Dortmund (DT), US DOE (US), Sherbrooke University(UK) Project contact person: M. Caselle, KIT, L. Andricek, MPG HLL, S. Charlebois, Sherbrooke